{"id":8,"date":"2024-05-02T09:12:35","date_gmt":"2024-05-02T09:12:35","guid":{"rendered":"http:\/\/140.112.17.235\/wordpress\/?page_id=8"},"modified":"2026-06-03T16:46:47","modified_gmt":"2026-06-03T16:46:47","slug":"introduction","status":"publish","type":"page","link":"http:\/\/140.112.17.235\/wordpress\/","title":{"rendered":""},"content":{"rendered":"\n
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Research Area<\/strong><\/h2>\n\n\n\n
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01 \/ Data Converter<\/strong><\/h4>\n\n\n\n

Pipeline ADCs \/ SAR ADCs \/ Time-Interleaved ADCs \/ CT Delta-Sigma ADCs<\/em><\/p>\n<\/div>\n\n\n\n

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\"\"<\/figure>\n\n\n\n

02 \/ SerDes<\/strong><\/strong><\/h4>\n\n\n\n

Phase Lock Loop (PLL) \/ Clock and Data Recovery (CDR) \/ Frequency Synthesizer \/ CTLE \/ DLL<\/em><\/p>\n<\/div>\n\n\n\n

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\"\"<\/figure>\n\n\n\n

03 \/ RF Circuit<\/strong><\/h4>\n\n\n\n

Zero-IF Receiver System Simulation \/ MIMO RF Transceiver for high-data rate wireless communication<\/em><\/p>\n<\/div>\n\n\n\n

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04 \/ Power Harvesting<\/strong><\/h4>\n\n\n\n

Multi-input Source Development \/ High Efficiency Power Management<\/em><\/p>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n

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Lab Resource<\/strong><\/h2>\n\n\n\n

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#Cadence<\/a><\/div>\n\n\n\n
#Synopsys<\/a><\/div>\n\n\n\n
#ADS (Keysight)<\/a><\/div>\n\n\n\n
#Mentor (Siemens)<\/a><\/div>\n\n\n\n
#\u500b\u4eba\u96fb\u8166<\/a><\/div>\n\n\n\n
#\u5be6\u9a57\u5ba4\u5de5\u4f5c\u7ad9<\/a><\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

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